A Normal I/O Order Radix-2 Fft Architecture to Process Two Data Streams

Abstract

Nowadays, many applications require simultaneous computation of multiple independent fast Fourier transform (FFT) operations with their outputs in natural order. Therefore, this brief presents a novel pipelined FFT processor for the FFT computation of two independent data streams. The proposed architecture is based on the multipath delay commutator FFT architecture. It has an N/2-pointdecimation in time FFT and N/2-point decimation in frequency FFT to process the odd and even samples of two data streams separately. The bit reversal operation is performed by the shift registers in the FFT architecture by interleaving the data. Therefore, the proposed architecture requires a lower number of registers and has high throughput.