64 BIT MAC Unit Design using Multiplier & Ripple Carry Adder Using Vedic Multiplier

Abstract

Multiplier Accumulator Unit (MAC) is a piece of Advanced Signal Processors. The speed of MAC relies upon the speed of multiplier. The proposed MAC unit diminishes the zone by decreasing the quantity of increase and expansion in the multiplier unit. Increment in the speed of operation is accomplished by the various leveled nature of the Vedic multiplier unit. So by utilizing a productive Vedic multiplier which exceeds expectations as far as speed, power and zone, the execution of MAC can be expanded. For this quick strategy for augmentation in light of old Indian Vedic arithmetic is utilized. Among different strategy for augmentation in Vedic science, Urdhva Tiryagbhyam is utilized and the augmentation is for 64 X 64 bits. Urdhva Tiryagbhyam is a general augmentation recipe relevant to all instances of augmentation. It empowers parallel age of halfway items, kills undesirable augmentation ventures with zeros.