High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF(2m)

Abstract

This paper proposes an efficient pipelined
architecture of elliptic curve scalar multiplication (ECSM)
over GF(2m). The architecture uses a bit-parallel finitefield
(FF) multiplier accumulator (MAC) based on the
Karatsuba–Ofman algorithm. The Montgomery ladder
algorithm is modified for better sharing of execution paths.
The data path in the architecture is well designed, so that
the critical path contains few extra logic primitives apart
from the FF MAC. In order to find the optimal number of
pipeline stages, scheduling schemes with different pipeline stages
are proposed and the ideal placement of pipeline registers is
thoroughly analyzed. We implement ECSM over the five binary
fields recommended by the National Institute of Standard and
Technology on Xilinx Virtex-4 and Virtex-5 field-programmable
gate arrays. The three-stage pipelined architecture is shown to
have the best performance, which achieves a scalar multiplication
over GF(2163) in 6.1 μs using 7354 Slices on Virtex-4. Using
Virtex-5, the scalar multiplication for m = 163, 233, 283, 409,
and 571 can be achieved in 4.6, 7.9, 10.9, 19.4, and 36.5 μs,
respectively, which are faster than previous results.