A Systematic Study on Chip and Package Co-Design of Clock Network

Abstract

The Package chip mounted on a printed wiring board. It increase the integration level of system, therefore we are able to work with smaller sizes that are the main advantage of Chip and Package Network.  It is an organic or ceramic substrate, and then increases the number of layers to handle this signal and power delivery to get a high efficiency &high performance. The field of packaging has been driven by the number of input output connections required to a chip. So we saw traditionally that quadruple flat packagecould not fulfill the I/O requirements in future. So moving towards ball grid array packageswhich enable a higher number of I/O. So this flip chip ball grid array package can support up to 1000 input-output connections.