Design A High Speed FFT Using SISO-CSKA For Communication

Abstract

In this paper we are using an carry skip adder which gives low power consumption and high speed operation.   By the both methods of concatenation and incrementaion we can enhance speed by  the performance of covetional carry skip adder (CSKA).  For the purpose of skip logic the both AND-OR and OR-AND inverter is used.  Basically the existed system occupies more area and it is complex. So to overcome that an algorithm is used that is fast fourier transform (FFT) which an efficient algorithm to compute the DFT and inverse DFT.  In thye fields of digital vedio and audio broadcasting and wireless LANS fast fourier transform is most widely used. In this paper we are implementing the folding techniques by using radix-2 DIT FFT algorithm. Fro all stages in proposed algorithm we use the radix-2 butterfly stages. From this the propsed algorithm will occupy less area and consumes the delay. By using xilinx software we can implemet these  all designs.