Performance Study of Robust Router using VHDL

Ch. Surendra, A. Phanindra Babu


This paper is based on the hardware coding which will give a great impact on the latency issue as the hardware itself will be designed according to the need.


Network-on-Chip; Simulation Router; FIFO; FSM; Register blocks

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Copyright (c) 2014 Ch. Surendra, A. Phanindra Babu

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