Utilization of Memory by using APC – OMS Approach

Kuruba. Mamatha, K. Thriveni

Abstract


Recent trends in Electronics had advanced to three mutual conflicting demands they are high Low power consumption, computational-bandwidth and reconfigure ability. It is a challenging task to figure out these conflicting demands. The optimization of a filter has a great impact in the hardware design. This optimization can be achieved by using various techniques in multipliers and adders. The efficient way of optimizing multiplier is carried out by implementing a Lookup table Multipliers that performs the fast computations with reduced area and power.  Generally, by using Anti symmetric product coding (APC) and Odd multiple storage (OMS) techniques we reduce the conventional multiplier to one-fourth of its size.  This reduced multiplier can be further reduced by implementing a Generalized version of a Anti symmetric product coding (GAPC) in a filter.  Therefore, this modified combination of GAPC and OMS reduces the size of an LUT multiplier.


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