Using Stochastic Computing To Implement Logical Bit Arithmetic Operations and Design of an Architecture for Synthesizing Polynomial Functions

Abstract

Stochastic computing is a random probability distribution; it performs on low cost, low power and low error tolerance. Most of the digital systems operate on binary representation of data i.e., binary radix. In this binary radix representation higher order bits weighted more than lower order bits. In proposed approach we implement logical bit arithmetic operations using stochastic logic for better performance and the precision length of bit stream increases for better precision and increase in computation time. Compared to conventional binary radix representation stochastic logic is easy to implement and they occupies less area ,power reduction and hardware cost is low, Complex operations can be performed in simple stochastic logic