Design of High Speed Finite Field Multiplier Using Ppa Technique

Abstract

In VLSI design, the performance of any system is determined by the performance of the elements i.e. Multiplier. Multiplier is one of the most important parts in any processor speed which improves the speed of the operation for example in special application processors like Digital Signal Processor (DSPs). Basically, the operational speed of any digital signal processor is strictly dependent upon the speed of the multipliers used. In this paper, parallel prefix adder and partial product generator are utilized in the multiplier for fast of operation. The proposed system provides high speed of operation.