A Novel Cascaded Nine-Level Inverter with reduced Switches and Harmonics

Kumra Akash, K. Ramesh, G.Naresh Kumar


In this paper, a novel cascade Nine-level inverter topology with a solitary input source incorporating exchanged capacitor systems is conferred. Compared with the standard cascade multi level inverter (CMI), the proposed topology reduces  the switch count  and generates nine-levels with just three H-bridge cells with a balanced dc voltage sources and just includes two charging switches. The capacitor charging circuit contains just power switches, so that the capacitor charging time is free of the load. The capacitor voltage can be controlled at an ideal level without complex voltage control algorithm and just utilize the most widely recognized  stage carrier phase-shifted sinusoidal pulse width modulation (CPS-SPWM) methodology. The activity standard and the charging-discharging feature  investigation are talked about in detail. A 1kW test model is constructed and tried to check the attainability and adequacy of the proposed topology.

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