Analysis of the computer caching scheme

Abstract

This thesis looks at ways to avoid pitfalls such as described. It also looks at the heuristic that the cache uses to choose the entry to evict. The bottleneck created by the system bus as the CPU processes data, will also be discussed. Furthermore, this thesis will look at the entire caching scheme, including the cache lines, the replacement policy, cache mapping, cache associativity, and when not to use the caching technology.