Design and Implementations of VlSI Based Robust Router 4 Channel Architecture

D. Rajesh, K. Kavitha


In this paper our attempt is to provide a multipurpose networking router by means of Verilog code, by this we can maintain the same switching speed with more secured way of approach we have even the packet storage buffer on chip being generated by code in our design in the so we call this as the self-independent router called as the VLSI Based router. This paper has the main focus on the implementation of hardware IP router.


Network-on-Chip; Simulation Router; FIFO; FSM; Register blocks

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Copyright (c) 2015 D. Rajesh, K. Kavitha

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