Area-Delay Dynamic Binary Adders in QCA

Abstract

In this paper, a novel quantum-dot cellular automata (QCA) adder design is presented that decrease the number of QCA cells compared to previously report designs. A novel 128-bit adder designed in QCA was implemented. It achieved speed performances higher than all the existing. QCA adders, with an area requirement comparable with the cheap RCA and CFA established. The area necessity of the QCA adders is comparable cheap with the RCA and CFA established. The proposed one-bit QCA adder design is based on a new algorithm that requires only three majority gates and two inverters for the QCA addition. We propose a new adder that outperforms all state-of-the art competitors and achieves the best area-delay tradeoff.