Analysis of Negative Current Conveyor

Maya Lalitkumar Patel, Prafful Dubey

Abstract


In this paper we have analysis of negative current conveyor using 0.12 µm using CMOS technique. The complete implementation and verification is done on the Tanner tool, Schematic of the negative current conveyor is designed on the S-Edit and net list simulation done by using T-spice and waveforms are analysed through the W-edit. The circuit is characterized by using the 0.12µm technology which is having supply voltage 0f 1.2volt.

 


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Copyright (c) 2016 Maya Lalitkumar Patel, Prafful Dubey

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