Design and Simulation of a Low-Voltage Low-Offset Amplifier

Abhimanu Surendra K Singh, Poonam Pathak

Abstract


In many applications, offset of the OP-AMPs should be cancelled to high accuracy be accomplished. In this work, an asymmetrical differential input circuit with active DC offset rejection circuit was implemented to minimize the systematic offset of the amplifier. The proposed OP-AMPs show that the systematic offset voltages is less than 80μV.


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