Delay optimization of 32-bit Variable Hybrid Carry SkipAdder(CSKA)

Abstract

The Carry skip adder (CSKA) is an efficient adder in terms of power consumption and area usage as the critical path delay and power-delay product of CSKA is small compared to other conventional adders. However the use of Multiplexer for Carry skip logic in CSKA causes increase in power consumption due to the use of large number of Transistors(i.e.,12). Hence, a power efficient CSKA called Concatenation-Incrementation (CI-CSKA) has been proposed. In CI-CSKA,the power reduction can be enhanced by replacing the Multiplexer that is used to skip the carry with Or-And-Invert (OAI)/And-Or Invert(AOI) logic. As the number of transistors is reduced to half by using AOI/OAI logic when compare to MUX, Power reduction is achieved without compromising the speed making it suitable for wide range of low power applications.For further improvement in delay,hybrid variable CI-CSKA has been proposed.Here the size of each stage is varied with increment in size from stage1 to nucleus stage and then decrement to the final stage.Simulations by using hybrid variable latency CSKA produces a high speed and reduce the power consumption..