Coding Techniques for Recycling Circuits in Its

ANKAM VASANTHA, R. NARAIAH

Abstract


The DSRC standards generally adopt FM0 and Manchester codes to achieve electricity-balance, improving the signal reliability. This paper not just evolves a completely reused VLSI architecture, but additionally exhibits a competent performance in comparison using the existing works. The devoted short-range communication (DSRC) is definitely an emerging method to push the intelligent transportation system into our daily existence Nonetheless, the codingdiversity between your FM0 and Manchester codes seriously limits the possibility to create a completely reused VLSI architecture for. Within this paper, the similarity-oriented logic simplification (SOLS) strategy is suggested to beat this limitation. The SOLS technique increases the hardware utilization rate from 57.14% to 100% for FM0 and Manchester encodings. The performance of the paper is evaluated around the post layout simulation in Taiwan Semiconductor Manufacturing Company (TSMC) .18-µm 1P6M CMOS technology. The utmost operation frequency is 2 GHz and 900 MHz for Manchester and FM0 encodings, correspondingly. The ability consumption is 1.58 mW at 2 GHz for Manchester encoding and 1.14 mW at 900 MHz for FM0 encoding. The main circuit area is 65.98 × 30.43 µm2. The encoding capacity of the paper can fully offer the DSRC standards of the use, Europe, and Japan.

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