A VLSI Design of a Novel Architecture for Orthogonal Latin Square Codes

Abstract

Reliability is a major concern in advanced electronic circuits. Errors caused for example by radiation become more common as technology scales. To ensure that those errors do not affect the  circuit  functionality  a  number  of  mitigation  techniques  can  be  used.  Among  them,  Error Correction  Codes  (ECC)  are  commonly  used  to  protect  memories  and  registers  in  electronic circuits.  When  ECCs  are  used,  it  is  of  interest  that  in  addition  to  correcting  a  given  number  of errors,  the  code  can  also  detect  errors  exceeding  that  number.  This ensuresthat  uncorrectable errors are detected and therefore silent data corruption does not occur. Among the ECCs used to protect circuits, one option is  Orthogonal Latin Squares (OLS) codes for which decoding can be efficiently  implemented.  In  this  paper,  an  enhancement  of  the  decoding  for  Double  Error Correction (DEC) OLS codes is proposed. The proposed scheme tries to reduce the probability of silent data corruption by implementing mechanisms to detect errors that affect more than two bits.