Mohan, K. Madan, Assistant Professor, Dept of ECE, Intellectual Institute of Technology, Affiliated to JNTUA, AP, India., India
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Vol 3, No 01 (2016): Vol-3_Issue-1_January_2016 - Research Articles
Design & Implementation of Area Delay Low Power Adders in QCA Using VHDL Code
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Vol 3, No 01 (2016): Vol-3_Issue-1_January_2016 - Research Articles
Error Correction to Decode Mainstream Logic Design by Using EG-LDPC Codes
Abstract PDF
All published Articles are Open Access at https://journals.pen2print.org/index.php/ijr/
Paper submission: ijr@pen2print.org