International Journal of Research

Raju, U. Amarnath, M.Tech,VLSI, Dept of ECE, Intellectual Institute of Technology, Affiliated to JNTUA, AP, India, India

• Vol 3, No 01 (2016): Vol-3_Issue-1_January_2016 - Research Articles
  Error Correction to Decode Mainstream Logic Design by Using EG-LDPC Codes
  Abstract  PDF