Digit-Level Serial-In Parallel-Out Multiplier Using Brent Kung Adder

Veduruparthi Bala Naga Jyothi, K. Amit Bindaj

Abstract


Adders are the most essential part of any digital system. Providing an efficient adder design satisfies the tradeoff between speed and space aides in increasing the performance of the system. In the modern age in addition to the tradeoff among speed and space, power consumption plays a vital role. Devices with low power consumption and good performance are always preferred. Parallel Prefix adders are the ones which are widely used in Digital Design. This is primarily because of the flexibility in designing the Adders. Brent Kung Adder is a low power adder, as it utilizes the minimum circuitry to obtain the result. The 16 bit design is extended to 32 bit, implemented in the physical level and successfully simulated.


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