Low Voltage and Low Power Divide-By- 2-3 Counter Design Using Pass Transistor Logic Circuit Technique

Darvin Venkatraj, B. Karthick

Abstract


An extended true-single-phase-clock (E-TSPC) based divide-by- 2-3 counter design for low supply voltage and low power con- sumption applications is presented. By using a wired OR scheme; only one transistor is needed to implement both the counting logic and the mode selection control. This can enhance the working frequency of the counter due to a reduced critical path between the E-TSPC flip flops (FFs).

Keywords


Extended true-single-phase-clock flip flops, low power, low voltage, prescaler.

Full Text:

PDF


Bookmark and Share


Copyright (c) 2014 Darvin Venkatraj, B. Karthick

Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.

 

All published Articles are Open Access at  https://journals.pen2print.org/index.php/ijr/ 


Paper submission: ijr@pen2print.org