A Memory-Based FFT Architecture Design Using Montgomery Multiplication

Abstract

Basically, in number-theoretic cryptographic algorithm, the modular multiplication operation consumes more time.  So there are fast multiplier architectures to minimize the delay and increase the throughput using parallelism and pipelining. However such designs are large in terms of area and gives less efficiency. An improved FFT-based Montgomery modular multiplication (MMM) algorithm is proposed. The FFT algorithm is used to provide fast convolution computation. We also introduce a general method for efficientparameter selection for the proposed algorithm. Architectures with single and double butterfly structures are designed obtaining low area-latency solutions, which we implemented on Xilinx Virtex-6 FPGAs.  From results it can observe that it produces better results compared to existed system.