Design an Area and Delay Optimized VLSI Architecture for DWT Using Lifting Scheme

Abstract

The fundamental idea behind wavelets is to analyze according to scale. Indeed, some researchers in the wavelet field feel that, by using wavelets, one is adopting a perspective in processing data. Wavelets are functions that satisfy certain mathematical requirements and are used in representing data or other functions.  In this paper, separable pipeline architecture for fast computation of the 2D DWT with a less area and low latency is proposed by using carry select adder. The low latency and less area is achieved by proper designing of 2-D DWT filtering processes and also efficiently transferring the data between the 2-D DWT filters.