Implementation of Low Power High Speed 32 bit ALU using FPGA

J. P. Verma, Maaz Arif, Brij Bhushan Choudhary, Nitish Kumar

Abstract


Digital design is an amazing and very broad field. The applications of digital design are present in our daily life, including computers, calculators, video cameras etc. The VHDL (VHSIC Hardware Description Language) has become an essential tool for designers in the world of digital design. This paper presents implementation of a 32-bit Arithmetic Logic Unit (ALU) using VHDL. Here the behavioral VHDL model of ALU is designed to perform 14 operations which includes logical, arithmetic and shift operations. The VHDL implementation and functionality test of the 32-bit ALU is done by using the Modelsim 5.4a tool.


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Copyright (c) 2016 J. P. Verma, Maaz Arif, Brij Bhushan Choudhary, Nitish Kumar

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