Design of Efficient 64-Bit Parallel PrefixBrentKung Adder

Abstract

A parallel-prefix adder gives the most excellent performance in VLSI design. However, performance of Brent-kung adder through black cell takes large area. So, gray cell can be replaced instead of black cell which gives the Efficiency inBrent-kungAdder. The proposed system hastwo stages of operations they are pre-processing stage and generation stage. The pre-processing stagehaving propagate and generate.Generation stage focuses on carry generation and final result. In ripple carry adder each bit having addition operation is waited for the preceding bit addition operation. In efficient Brent - Kungadder, addition operation does not wait for preceding bit addition operation and modification is done at gate level toimprove the speed and decreases the area.