Analysis of Operational Amplifier using 120 nm Technology

Jayanti Kumawat, Poonam Pathak

Abstract


In this paper A CMOS single output 2 stage operational amplifier is conferred that operates at 1.5 V power offer at 0.12micrometer (i.e., one hundred twenty nm) technology. It’s designed to fulfil a group of provided specifications. The distinctive behaviour of the MOSFET in sub- threshold region not only permits a designer to figure at low input bias current however conjointly at low voltage. This op-amp has terribly low standby power consumption with a high driving capability and operates at low voltage in order that the circuit operates at low power. The op-amp provides a gain of 20.4dB and bandwidth 202 kHz also provide bandwidth of 2.15MHz for unity gain a load at five pF. This op-amp incorporates a PSRR (+) of 85.0 dB and a PSRR (-) of 60.0 dB. It’s a CMRR (dc) of 64.4 dB, an output slew rate of 12.465 v/μs. The power consumption for the op-amp is 0.9mW. The op-amp is meant within the 120nm technology.

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Copyright (c) 2016 Jayanti Kumawat, Poonam Pathak

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