Implementation of Universal filter using DVCC on 120nm Technology

Abstract

In this paper we are focus on CMOS high  performance, high bandwidth and high frequency current mode signal DVCC-II is presented and  provides high driving capability. We use DVCC-II for implementation of single input and multiple output, multiple input and single output filter.  In DVCC-II block three stages connected in circuit and rail to rail input-output operation. The proposed second generation DVCC has been designed in 0.12µm CMOS technology with 1.5V supply voltage. Tanner tool simulator is used for circuit simulation. In low voltage sub-micrometer analog circuit accuracy and precision can be limited by the finite gain as well as by input offset voltage. Proposed circuit features have high gain, high bandwidth and low power dissipation that can be achieved simultaneously without requiring well matched register.