Design And Implementation Of Fault Tolerant Fft’s For Reconfigurable Caches Using Parseval Checks

Abstract

A low complexity and error tolerant design has more demand in the signal processing systems. Algorithmic Based Fault Tolerance (ABFT) technique utilizes the algorithmic properties for detecting and correcting the errors. FFTs are the key building blocks in many communication and signal processing systems.  Various protection schemes have been proposed to detect and correct the errors in FFT. Parseval or Sum of squares check is one of the protection scheme which is widely used. It is common to find various blocks in parallel. Newly, a technique that utilizes fact to implement Fault Tolerance on parallel filters has been proposed. This technique is first applied for protecting FFT. Hence, two improved protection schemes are proposed and evaluated. These schemes combine the use of double error correction codes and parseval checks. Further, these proposed schemes are reducing the implementation cost of production.