International Journal of Research
| Issue | Title | |
| Vol 4, No 10 (2017): Vol-04_Issue-10_September_2017 | High Efficiency Single Phase Transformerless Inverter For Grid Connected Pv System | Abstract PDF |
| Paramita Bhaumik, K.S. Santhosh | ||
| Vol 2, No 12 (2015): VOL-2_ISSUE-12_December_2015 | High Gain Efficient Interleaved Dc-Dc Converter for Induction Motor Applications | Abstract PDF |
| Narsingoju Mounika, R. Kumarswamy | ||
| Vol 4, No 14 (2017): Vol-04-Issue-14-November-2017 | High performance and high efficiency DET flip flop by using Clock gating techniques | Abstract PDF |
| Thirupataiah Perla, Bandhu Mounika | ||
| Vol 5, No 12 (2018): Vol-05-Issue-12-April-2018 | High Performance Concrete Two Way Slabs In Flexure Loading | Abstract PDF |
| P. DINESH | ||
| Vol 5, No 01 (2018): Vol-05-Issue-01-January-2018 | High Performance Multiple Constant Multiplier Using Modified Booth Algorithm | Abstract PDF |
| K. Sandhya Rani, T. Prasad Babu | ||
| Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 | High Performance of CMOS 1-Bit Full adder cell Based on Novel Techniques | Abstract PDF |
| P. Thirupathi, D. Sravani | ||
| Vol 4, No 9 (2017): Vol-4_Issue-09_August_2017 | High Performance VLSI Architecture of NII Metric Compression Turbo Decoding Architecture | Abstract PDF |
| Ch. Rajesh Kumar, Evuri Sireesha, Boggarapu Kantha Rao | ||
| Vol 5, No 8 (2018): Vol-05-Issue-08-March-2018-Special-Issue-Research-World | High School Students’ Attitude towards Science | Abstract PDF |
| Dr. T. THILAGAVATHY, S. BALA AYYAPPAN | ||
| Vol 6, No 6 (2019): Vol-6-Issue-6-May-2019 | High secured E-Voting System | Abstract PDF |
| K .N V P S B Ramesh, Vasideddy narasimham, T V L Srinivas | ||
| Vol 5, No 17 (2018): Vol-05-Issue-17-July-2018 | High Speed Aes S-Box/Inv S-Box Design With S.R And M.C Technique | Abstract PDF |
| KODAVALI BHARGAV KUMAR, K. RADHA | ||
| Vol 4, No 13 (2017): Vol-04-Issue-13-October-2017 | High Speed and Area Efficient Soft Cancelation Decoder Architectures for Polar Codes | Abstract PDF |
| H. YASMEEN, R. RAJU KUMAR | ||
| Vol 4, No 7 (2017): Vol-04_Issue-07_June_2017 | HIGH SPEED AND AREA EFFICIENT TRUNCATING MULTIPLIER FOR D.S.P APPLICATIONS | Abstract PDF |
| M. BHARATHI, P. MANAHOR RAO | ||
| Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 | High Speed and Energy Efficient Carry Skip Adder Operating Under A Wide Range of Supply Voltages Levels | Abstract PDF |
| Mohammed Mujahed Ali Adeel, Imthiazunnisa Begum | ||
| Vol 4, No 7 (2017): Vol-04_Issue-07_June_2017 | High Speed and Low Power Dual Constant Multiplier | Abstract PDF |
| J. PRAVEEN, N. ARAVIND | ||
| Vol 7, No 6 (2020): Vol-7-Issue-6-June-2020 | High Speed and Low Power VLSI Architecture for Inexact Speculative Adder | Abstract PDF |
| M Mahesh, Shasi Kumar | ||
| Vol 4, No 13 (2017): Vol-04-Issue-13-October-2017 | High Speed Fault Tolerant Parallel Ffts Using Error Correction And Detection Codes | Abstract PDF |
| G. KIRAN KUMAR, K. SEETHARAM | ||
| Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 | High Speed Finite Field Multiplier GF(2M) for Cryptographic Applications | Abstract PDF |
| AlapatiMegha Mala, N. Chandra Shekhar | ||
| Vol 5, No 01 (2018): Vol-05-Issue-01-January-2018 | High Speed Fpga Implimantation of Rsd-Based Ecc Processor | Abstract PDF |
| K. Satish Goud, M.S. Shyam | ||
| Vol 4, No 13 (2017): Vol-04-Issue-13-October-2017 | High Speed hybrid FIR Filter Architecture for Fixed and Reconfigurable Applications | Abstract PDF |
| Medisetti Mounika, B .V.V. Satyanarayana | ||
| Vol 5, No 4 (2018): Vol-05-Issue-04-February-2018 | High Speed Implementation of Novel Adder Based On Parallel Prefix Technique | Abstract PDF |
| Rebba Santhi Swarupa Rani, K. Ravi Kumar | ||
| Vol 5, No 4 (2018): Vol-05-Issue-04-February-2018 | High Speed Implementation of Novel Fft Based On Parallel Prefix Technique | Abstract PDF |
| Rebba Santhi Swarupa Rani, K. Ravi Kumar | ||
| Vol 2, No 7 (2015): VOL-2_ISSUE-07_JULY_2015 | High Speed Low Power Combinational and Sequential Booth Multiplayer Using Trong Circuits using Reversible logic | Abstract PDF |
| M. Divya, B. Shoba rani | ||
| Vol 4, No 7 (2017): Vol-04_Issue-07_June_2017 | High Speed Parallel Prefix Novel Ladner Fischer Adder | Abstract PDF |
| K.KRISHNA KUMARI, S.SURESH BABU | ||
| Vol 5, No 4 (2018): Vol-05-Issue-04-February-2018 | High Speed Rate Compatible Ldpc Codes For Long Distance Transmission with Fec | Abstract PDF |
| Miss. P.RAJINI DEVI, Mr. SK.MASTAN | ||
| Vol 4, No 13 (2017): Vol-04-Issue-13-October-2017 | High Speed Redundant Binary Multipliers Using Ppp and Ppg | Abstract PDF |
| B. SNEHALATHA, T. RATAN BABU | ||
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