Browse Title Index


 
Issue Title
 
Vol 6, No 10 (2019): Vol-6-Issue-10-September-2019 Design Of Controller For Inspection Packaging And Storage Abstract   PDF
P. SATYANARAYANA MURTHY, DR.B. SUDHEER PREM KUMAR
 
Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 Design of Controller for Three-Phase Ups System Operating Under Profoundly Nonlinear Loads. Abstract   PDF
T. Dinesh, T.Anil Kumar
 
Vol 5, No 10 (2018): Vol-05-Issue-10-March-2018-International-Conference-on-Innovations-in-Information-and-Communication-Technology-2018 Design of Cost Efficient Virtual Filter Using Labview Platform Abstract   PDF
G. Shanmugaraj, V.Sai Lakshmi Sruthi, R.S.Adlin Beryl, R. Golde
 
Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 Design of Damping of Power System Oscillation usingSTATCOM With Energy Storage Abstract   PDF
R. Mounika, V. Prakash
 
Vol 2, No 4 (2015): Vol-2_Issue-04_April_2015 Design of Data Acquisition System for Analysis of Ecg Signal Using Low Power Processor Abstract   PDF
Rakesh Kumar, Rajvir Singh
 
Vol 2, No 12 (2015): VOL-2_ISSUE-12_December_2015 Design of Delay Efficient Carry Save Adder Abstract   PDF
K. Deepthi, M. Jayasree
 
Vol 5, No 17 (2018): Vol-05-Issue-17-July-2018 Design Of Dfig-Based Wecs Using Resonant Feedback Compensators Under Unbalanced Grid Voltage Conditions Abstract   PDF   PDF
CHINTHA BABY1, D. TATARAO
 
Vol 5, No 22 (2018): Vol-5-Issue-22-November-2018 Design of Digital Clock Manager Based Reconfigurable BFD–True Random Number Generator in Xilinx Abstract   PDF
KOTAREDDY V SUBBAREDDY, DR.E. SARVARAMESWARUDU
 
Vol 2, No 5 (2015): VOL-2_ISSUE-05_May_2015 Design of Digital Fir Filter Using MCM Technique Abstract   PDF
Acharya Nikunj K, Taranath H. B
 
Vol 3, No 11 (2016): Vol-3_Issue-11_July_2016 Design of Digit-Serial FIR Filters using CSD Adder Graph Multiplier Abstract   PDF
N. MANASA, V. Ramya
 
Vol 3, No 12 (2016): Vol-3_Issue-12_August_2016 Design of Digit-Serial FIR Filters Using GB Algorithm Abstract   PDF
N. MANASA, V. VIJAYA, G. BABU
 
Vol 3, No 13 (2016): Vol-3_Issue-13_September_2016 Design of Digit-Serial Fir Filters Using Mag Adder Graph Multiplier Abstract   PDF
K. SWAPNA, M. SUNIL BABU
 
Vol 3, No 18 (2016): Vol-3_Issue-18_December_2016 Design of Direct Torque Control Based on Space Vector Modulation for Induction Motors Abstract   PDF
Bhukya Ravi, G. Naresh
 
Vol 5, No 12 (2018): Vol-05-Issue-12-April-2018 Design of Disorder and Fault Tolerant Non-volatile Spintronic Turn Flops Abstract   PDF
RAMADUGU SAI TEJASWINI, DEVATHOTI RAM BABU
 
Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 Design of Dual Fault Tolerant Parallel Ffts Using Parseval Checks Abstract   PDF
Gopi Ram Gattu, N. Gopi Chand
 
Vol 4, No 5 (2017): Vol-04_Issue-05_April_2017 Design of Dual Redundancy Can-Bus Controller with Very Efficient Memory Controller Abstract   PDF
Neelam. Sravani, S.A. Vara Prasad
 
Vol 4, No 9 (2017): Vol-4_Issue-09_August_2017 Design of Dynamic Comparators using Tanner EDA Tools Abstract   PDF
Mehta Vimal, Poonam Pathak
 
Vol 5, No 12 (2018): Vol-05-Issue-12-April-2018 Design Of Dynamic Voltage Restorer And Active Power Filter For Wind Power Systems Subject To Unbalanced And Harmonic Distorted Grid Abstract   PDF
SAMUTHRA PANDIAN. R
 
Vol 3, No 13 (2016): Vol-3_Issue-13_September_2016 Design of Efficient 64-Bit Parallel PrefixBrentKung Adder Abstract   PDF
JAKKULA RADHIKA, Mr. P.PAVAN KUMAR, Dr. A. BALAJI NEHRU
 
Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 Design of Efficient Binary Comparators in Quantum-Dot Cellular Automata Abstract   PDF
S. Madhavi, J. Ramakrishna
 
Vol 2, No 7 (2015): VOL-2_ISSUE-07_JULY_2015 Design of Efficient Sixty-four Bit Mac Unit Using Vedic Multiplier Abstract   PDF
S. Raju, J. Raja shekhar
 
Vol 4, No 10 (2017): Vol-04_Issue-10_September_2017 Design Of Encoder And Decoder Using Hybrid Lut/Multiplexer Abstract   PDF
S.A. Sunitha Sree Konduru, N. Nageswara Rao, P.Bala Murali Krishna
 
Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 Design of Energy Control Center for Distributed Generators Using Multi-Agent System Abstract   PDF
S. Steeven, V Prakash
 
Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 Design of External Inductor for Improving Performance of Voltage Controlled Dstatcom Abstract   PDF
D. Ramesh, G.Vishnu Vardhan Reddy, D. Naresh
 
Vol 5, No 01 (2018): Vol-05-Issue-01-January-2018 Design of Fast and Low Area Pre-Encoded Multipliers Based on NR8SD Encoding technique for DSP/Multimedia applications Abstract   PDF
Saladi Balaji Gupta, Palivela Soundarya Mala
 
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