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Issue |
Title |
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Vol 3, No 13 (2016): Vol-3_Issue-13_September_2016 |
Design & Simulation of 3-Phase 3-Level Voltage Source Inverter for PV Synchronization to Grid |
Abstract
PDF
|
Yadam Nagendra, Naresh Bandi, Veeranjaneyulu Methra |
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Vol 3, No 01 (2016): Vol-3_Issue-1_January_2016 |
Design & Simulation of Gid Integration of Renewable Energy Sources Using High Frequency Link Cascade Multilevel Inverter |
Abstract
PDF
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M. Abdul Rahiman, Shaik Dawood |
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Vol 3, No 01 (2016): Vol-3_Issue-1_January_2016 |
Design & Simulation of Grid Integration of Renewable Energy Sources Using High Frequency Link Cascade Multilevel Inverter |
Abstract
PDF
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M. Jaya Madhuri, K. Kranthi Pratap Singh |
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Vol 3, No 01 (2016): Vol-3_Issue-1_January_2016 |
Design & Simulation of Improved Active Power Filter for Renewable Energy Power Applications |
Abstract
PDF
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K. Siva, S. Raj shekar |
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Vol 2, No 12 (2015): VOL-2_ISSUE-12_December_2015 |
Design & Simulation of Transformer less Universal Active Power Filter |
Abstract
PDF
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Pinjala Srikanth, Yamparala Nagendraiah |
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Vol 3, No 01 (2016): Vol-3_Issue-1_January_2016 |
Design & Simulation UPQC with Minimum VA Rating for Power Quality Improvement |
Abstract
PDF
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Mohammed Muzakkirullah Sharief, Shaik Dawwod |
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Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 |
Design A 8 Bit Fault Tolerant Parallel Ffts Using Parseval Checks |
Abstract
PDF
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T. Venkata Narayana Reddy, G.V.Ravi Kumar |
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Vol 5, No 15 (2018): Vol-05-Issue-15-May-2018 |
Design A Approximate Parallel Multiplier For Medical Applications |
Abstract
PDF
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K KRANTH KIRAN, K VENKAT RAO, K. ANKA SIVAPRASAD |
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Vol 4, No 01 (2017): Vol-04_Issue-01_January_2017 |
Design A B- Encoder and Decoder Using Booth |
Abstract
PDF
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Dr. K. SriHari Rao, Mr. P. SrinivasaRao, Thatikol Srinivas |
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Vol 5, No 01 (2018): Vol-05-Issue-01-January-2018 |
Design a Cryptography Algorithm Using Shiftrow Mixcolun Technique |
Abstract
PDF
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G MADHUSUDHANA RAO, P JAYA BABU, CH. MANI TEJA |
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Vol 5, No 15 (2018): Vol-05-Issue-15-May-2018 |
Design A Dynamic Reconfiguration Manchester Compression For Web Applications |
Abstract
PDF
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BOYINA GOPI SAIRAM, G SRINIVAS Rao, K. ANKA SIVAPRASAD |
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Vol 5, No 4 (2018): Vol-05-Issue-04-February-2018 |
Design A Fault Tolerant Fft’s Using Ahl Logic And Razor Flipflop |
Abstract
PDF
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Sudanagunta Kiran, N. Prakash Babu |
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Vol 5, No 16 (2018): Vol-05-Issue-16-June-2018 |
Design a High Quality Grid Connected PV Systems with Constant Power Generation and Input Output Linearizer Controller |
Abstract
PDF
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Kisan Kumar, Bibha Rani Singh, Anjana Tripathi |
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Vol 4, No 13 (2017): Vol-04-Issue-13-October-2017 |
Design a High Speed and Area Efficient Carry Skip Ppa |
Abstract
PDF
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P. SWARNALATHA, K. SEETHARAM |
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Vol 5, No 4 (2018): Vol-05-Issue-04-February-2018 |
Design a High Speed and Area Efficient Multiplier Using Adiabatic Logic |
Abstract
PDF
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VINJAMURI V ENKATA ARJUN, BHADINENI RAJESH |
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Vol 5, No 16 (2018): Vol-05-Issue-16-June-2018 |
Design a High Speed and Energy Efficient Novel FFT Using CSKA |
Abstract
PDF
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GARLAPATI SRAVANTHI, SHAIK KHAMURUDDEEN |
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Vol 5, No 4 (2018): Vol-05-Issue-04-February-2018 |
Design a High Speed Carry Skip Adder with Ladner Fischer Technique |
Abstract
PDF
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Avvaru. Vijay Kumar, K.Ramesh Babu |
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Vol 5, No 12 (2018): Vol-05-Issue-12-April-2018 |
Design a High Speed Error Prediction AES Algorithm |
Abstract
PDF
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DOPPALAPUDI. SRAVYA, NELAM RAJAKUMARI |
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Vol 5, No 01 (2018): Vol-05-Issue-01-January-2018 |
Design a high speed fft using carry skip adder for communication |
Abstract
PDF
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A.Sandya Rani, K.Venkata Rao, A. Siva Prasad |
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Vol 5, No 01 (2018): Vol-05-Issue-01-January-2018 |
Design A High Speed FFT Using SISO-CSKA For Communication |
Abstract
PDF
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Kadaveru Ramesh, P. Satish Chandra |
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Vol 5, No 12 (2018): Vol-05-Issue-12-April-2018 |
Design A High Speed Novel Cryptography Using F.F Multiplier |
Abstract
PDF
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M. VASAVI, N. LEELA KRISHNA SAI, K. NARASIMHA RAO |
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Vol 5, No 15 (2018): Vol-05-Issue-15-May-2018 |
Design A High Speed Parallel Prefix Adder for Communication |
Abstract
PDF
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YELLABOINA BHAVANI, S. SRI VIDYA |
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Vol 4, No 6 (2017): Vol-04_Issue-06_May_2017 |
Design A High Throughput Vedic Multiplier Using Kogee-Stone Adder |
Abstract
PDF
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Maddala Veena Prathyusha Susmitha, Mohana Ranga Rao Raavi |
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Vol 3, No 8 (2016): Vol-3_Issue-8_April_2016 |
Design a High-Gain Wideband Two-Stage Cascode Low Noise Amplifier with Chebeyshiv Filter matching Technique |
Abstract
PDF
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Sneha P. Sawarkar, Bhushan R. Vidhale |
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Vol 4, No 3 (2017): Vol-04_Issue-03_MARCH_2017 |
Design a Hybrid approach to reduce PAPR in OFDM |
Abstract
PDF
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Jaskiran Kaur, Gurbahar Singh |
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