International Journal of Research
| Issue | Title | |
| Vol 7, No 6 (2020): Vol-7-Issue-6-June-2020 | Low Power Parallel VLSI Architecture for Mbist | Abstract PDF |
| G SAI RAM RAJU, Mrs. K VANI | ||
| Vol 1, No 10 (2014): Vol-1_Issue-10_November_2014 | Low Power Ripple Carry Adder Design Using MTCMOS Technique | Abstract PDF |
| S. Veereshwara Rao, K. Padmaja Devi | ||
| Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 | Low Power Test Pattern Generator using LFSR for Speed up the ATP Process | Abstract PDF |
| D. Rekha, B.Siva Kumar | ||
| Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 | Low Power Testable Reversible Sequential Circuits implementation on FPGA | Abstract PDF |
| P. Rahul Reddy | ||
| Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 | Low Power Variable Latency Multiplier With Ah Logic | Abstract PDF |
| V. SRIKANTH, B. SUDARSHAN | ||
| Vol 4, No 13 (2017): Vol-04-Issue-13-October-2017 | Low Power Variation Tolerant Non Volatile Lookup Table Design | Abstract PDF |
| Venkatesh B, G. Veerapandu | ||
| Vol 5, No 15 (2018): Vol-05-Issue-15-May-2018 | Low Power Vlsi Architecture For Adiabatic Offset Encoder | Abstract PDF |
| Md. Nasreen, Md.Shamshad Begum | ||
| Vol 7, No 5 (2020): Vol-7-Issue-5-May-2020 | Low Power VLSI Architecture for Modular Adder by Reversible Gates | Abstract PDF PDF |
| Ms. Poojarieswaramma, Ms. Nandini | ||
| Vol 6, No 10 (2019): Vol-6-Issue-10-September-2019 | Low Stakes Writing: From Activities To Assignments | Abstract PDF |
| Kattaboyeva Muborak | ||
| Vol 1, No 4 (2014): Vol-1_Issue-4_May_2014 | Low Voltage and Low Power Divide-By- 2-3 Counter Design Using Pass Transistor Logic Circuit Technique | Abstract PDF |
| Darvin Venkatraj, B. Karthick | ||
| Vol 2, No 4 (2015): Vol-2_Issue-04_April_2015 | Low Voltage Switched Op Amp Circuits | Abstract PDF |
| Anosh Justin, Akshay dutt, Gautam saini | ||
| Vol 4, No 14 (2017): Vol-04-Issue-14-November-2017 | Low-Altitude UAV-Based Internet of Things Services: Comprehensive Survey and Future Perspectives | Abstract PDF |
| Lanka Sunitha, C.Ramesh Kumar | ||
| Vol 2, No 8 (2015): VOL-2_ISSUE-08_August_2015 | Low-Complexity Low-Latency Architecture for Identical of Data Encoded With Hard Systematic Error-Correcting Codes | Abstract PDF |
| Piduguralla N S Prapulla, N. Veeraih, S. Neelima | ||
| Vol 3, No 10 (2016): Vol-3_Issue-10_June_2016 | Low-Complexity Low-Latency Architecture for Matching Of Data Encoded With Hard Systematic Error-Correcting Codes | Abstract PDF |
| Shashi vardhan, B Vasunaik | ||
| Vol 3, No 13 (2016): Vol-3_Issue-13_September_2016 | Low-Cost ZigBee® Distributed Transformer Monitoring System Based OnZigbee Technology | Abstract PDF |
| Avula Mounika, V. Karthik Kumar | ||
| Vol 4, No 14 (2017): Vol-04-Issue-14-November-2017 | Low-Frequency Ac Transmission for Offshore Wind Power | Abstract PDF |
| Sugunakar Mamidala, V . Saidulu | ||
| Vol 3, No 14 (2016): Vol-3_Issue-14_October_2016 | Low-Power And Area-Efficient Modified Carry Select Adder With Single Rca & Bec | Abstract PDF |
| Vanjari Ranjith Kumar, E. Sudhakar | ||
| Vol 4, No 2 (2017): Vol-04_Issue-02_February_2017 | Low-Power and Area-Efficient Shift Register Using Pulsed Latches with modified SSASPL with130nM CMOS Technology | Abstract PDF |
| B. Sesharatnam, T. Vidya | ||
| Vol 4, No 13 (2017): Vol-04-Issue-13-October-2017 | Low-Power And Area-Efficient Shift Register Utilizing Beat Latches | Abstract PDF |
| P.Mahesh Babu, A.Rama Satya Balaji | ||
| Vol 4, No 14 (2017): Vol-04-Issue-14-November-2017 | Low-Power Programmable Prpg with Test Compression Capabilities | Abstract PDF |
| P. Snigdha Kamala, Sreenath Kashyap | ||
| Vol 1, No 4 (2014): Vol-1_Issue-4_May_2014 | Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme | Abstract PDF |
| V. Tholkappian, B. Karthick | ||
| Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 | Low-power VLSI design with new technologies | Abstract |
| Y. THIRUMALA BABU | ||
| Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 | Lsf Based Voltage Profile Improvement In Radial Distribution System | Abstract PDF |
| Mudda Rajarao | ||
| Vol 4, No 14 (2017): Vol-04-Issue-14-November-2017 | LTE Based SUI Modeling For FLIP-OFDM To Analyse The Performance Of Optical Wireless Communication | Abstract PDF |
| Kosalendra Eethamakula | ||
| Vol 4, No 17 (2017): Vol-04-Issue-17-December-2017 | LTE modeling for low complexity Time Varying channels in MIMO-OFDM | Abstract PDF |
| U Himavarsha | ||
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